A sub IV 96 μW fully operational digital hearing aid chip with internal status controller

Abstract

A Low power fully operational digital hearing aid chip is proposed and implemented. The Σ-Δ-A ADC adopts the status controller to realize adaptive SNR technique without any external control. To achieve both low power consumption and high programmability, dedicated low power DSP with 6 control parameters is designed. The heterogeneous Σ-Δ DAC reduces more power dissipation without performance degradation. The digital hearing aid system is fabricated in 0.18 μm CMOS technology, consumes less than 96μW and has a die size of 2.8 mm x 1.1 mm.