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College of Engineering(공과대학)School of Electrical Engineering(전기및전자공학부)EE-Conference Papers(학술회의논문)

A Delay Line Circuit Design For Crosstalk Minimization Using Genetic Algorithm

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dc.contributor.authorKim, Joungho-
dc.contributor.authorChung, Chaeho-
dc.contributor.authorLee, Soobum-
dc.contributor.authorKwak, Byungman-
dc.contributor.authorKim, Gawon-
dc.date.accessioned2013-03-17T08:05:41Z-
dc.date.available2013-03-17T08:05:41Z-
dc.date.created2012-02-06-
dc.date.issued2006-
dc.identifier.citationChina-Japan-Korea Joint Symposium on Optimization of Structural and Mechanical Systems, v., no., pp.551 - 556-
dc.identifier.urihttp://hdl.handle.net/10203/141410-
dc.languageENG-
dc.titleA Delay Line Circuit Design For Crosstalk Minimization Using Genetic Algorithm-
dc.typeConference-
dc.type.rimsCONF-
dc.citation.beginningpage551-
dc.citation.endingpage556-
dc.citation.publicationnameChina-Japan-Korea Joint Symposium on Optimization of Structural and Mechanical Systems-
dc.identifier.conferencecountryChina-
dc.identifier.conferencecountryChina-
dc.contributor.localauthorKim, Joungho-
dc.contributor.nonIdAuthorChung, Chaeho-
dc.contributor.nonIdAuthorLee, Soobum-
dc.contributor.nonIdAuthorKwak, Byungman-
dc.contributor.nonIdAuthorKim, Gawon-
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EE-Conference Papers(학술회의논문)
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