A Single Bitline Writing Scheme for Low Power Reconfigurable I/O DRAM Macro
| DC Field | Value | Language |
|---|---|---|
| dc.contributor.author | Yoo, Hoi-Jun | - |
| dc.contributor.author | Kook, Jeonghoon | - |
| dc.date.accessioned | 2013-03-16T19:37:31Z | - |
| dc.date.available | 2013-03-16T19:37:31Z | - |
| dc.date.created | 2012-02-06 | - |
| dc.date.issued | 2000 | - |
| dc.identifier.citation | IEEE European Solid-State Circuit Conference, v., no., pp.384 - 387 | - |
| dc.identifier.uri | http://hdl.handle.net/10203/135030 | - |
| dc.language | ENG | - |
| dc.publisher | IEEE | - |
| dc.title | A Single Bitline Writing Scheme for Low Power Reconfigurable I/O DRAM Macro | - |
| dc.type | Conference | - |
| dc.type.rims | CONF | - |
| dc.citation.beginningpage | 384 | - |
| dc.citation.endingpage | 387 | - |
| dc.citation.publicationname | IEEE European Solid-State Circuit Conference | - |
| dc.identifier.conferencecountry | Sweden | - |
| dc.identifier.conferencecountry | Sweden | - |
| dc.contributor.localauthor | Yoo, Hoi-Jun | - |
| dc.contributor.nonIdAuthor | Kook, Jeonghoon | - |
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