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College of Engineering(공과대학)School of Electrical Engineering(전기및전자공학부)EE-Conference Papers(학술회의논문)

Spee/Area/Power Trade-Off in the Merged-DRAM-Logic (System-on-Chip) for Real-Time Signal Processing

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dc.contributor.authorKim, Lee-Sup-
dc.contributor.authorChang, S-
dc.date.accessioned2013-03-16T17:39:29Z-
dc.date.available2013-03-16T17:39:29Z-
dc.date.created2012-02-06-
dc.date.issued2001-
dc.identifier.citationInternational Conference on Information Systems Analysis and Synthesis, v., no., pp. --
dc.identifier.urihttp://hdl.handle.net/10203/133855-
dc.languageENG-
dc.titleSpee/Area/Power Trade-Off in the Merged-DRAM-Logic (System-on-Chip) for Real-Time Signal Processing-
dc.typeConference-
dc.type.rimsCONF-
dc.citation.publicationnameInternational Conference on Information Systems Analysis and Synthesis-
dc.identifier.conferencecountryUnited States-
dc.identifier.conferencecountryUnited States-
dc.contributor.localauthorKim, Lee-Sup-
dc.contributor.nonIdAuthorChang, S-
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EE-Conference Papers(학술회의논문)
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