An area-efficient iterative modified-booth multiplier based on self-timed clocking
| DC Field | Value | Language |
|---|---|---|
| dc.contributor.author | Shin, M.-C. | ko |
| dc.contributor.author | Kang, S.-H. | ko |
| dc.contributor.author | Park, In-Cheol | ko |
| dc.date.accessioned | 2013-03-16T05:38:36Z | - |
| dc.date.available | 2013-03-16T05:38:36Z | - |
| dc.date.created | 2012-02-06 | - |
| dc.date.created | 2012-02-06 | - |
| dc.date.issued | 2001-09-23 | - |
| dc.identifier.citation | IEEE International Conference on: Computer Design: VLSI in Computers and Processors (ICCD 2001), pp.511 - 512 | - |
| dc.identifier.uri | http://hdl.handle.net/10203/128008 | - |
| dc.language | English | - |
| dc.publisher | IEEE | - |
| dc.title | An area-efficient iterative modified-booth multiplier based on self-timed clocking | - |
| dc.type | Conference | - |
| dc.identifier.wosid | 000173699700076 | - |
| dc.identifier.scopusid | 2-s2.0-0035189705 | - |
| dc.type.rims | CONF | - |
| dc.citation.beginningpage | 511 | - |
| dc.citation.endingpage | 512 | - |
| dc.citation.publicationname | IEEE International Conference on: Computer Design: VLSI in Computers and Processors (ICCD 2001) | - |
| dc.identifier.conferencecountry | US | - |
| dc.identifier.conferencelocation | Austin, TX | - |
| dc.contributor.localauthor | Park, In-Cheol | - |
| dc.contributor.nonIdAuthor | Shin, M.-C. | - |
| dc.contributor.nonIdAuthor | Kang, S.-H. | - |
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