Equivalent circuit representation and dimension reduction technique for efficient FDTD modeling of power/ground plane

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dc.contributor.authorLee, H.ko
dc.contributor.authorKim, H.ko
dc.contributor.authorKim, Jounghoko
dc.contributor.authorJeong, Y.C.ko
dc.contributor.authorKim, J.ko
dc.date.accessioned2013-03-16T04:41:31Z-
dc.date.available2013-03-16T04:41:31Z-
dc.date.created2012-02-06-
dc.date.created2012-02-06-
dc.date.issued2001-10-29-
dc.identifier.citationIEEE 10th Topical Meeting on Electrical Performance of Electronic Packaging, EPEP 2001, pp.145 - 148-
dc.identifier.urihttp://hdl.handle.net/10203/127545-
dc.languageEnglish-
dc.publisherIEEE-
dc.titleEquivalent circuit representation and dimension reduction technique for efficient FDTD modeling of power/ground plane-
dc.typeConference-
dc.identifier.wosid000172924000036-
dc.identifier.scopusid2-s2.0-0035699155-
dc.type.rimsCONF-
dc.citation.beginningpage145-
dc.citation.endingpage148-
dc.citation.publicationnameIEEE 10th Topical Meeting on Electrical Performance of Electronic Packaging, EPEP 2001-
dc.identifier.conferencecountryUS-
dc.identifier.conferencelocationCambridge, MA-
dc.contributor.localauthorKim, Joungho-
dc.contributor.nonIdAuthorLee, H.-
dc.contributor.nonIdAuthorKim, H.-
dc.contributor.nonIdAuthorJeong, Y.C.-
dc.contributor.nonIdAuthorKim, J.-
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EE-Conference Papers(학술회의논문)
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