670 ps, 64 bit dynamic low-power adder design

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dc.contributor.authorWoo, Ramchan-
dc.contributor.authorLee, Se-Joong-
dc.contributor.authorYoo, Hoi-Jun-
dc.date.accessioned2013-03-16T02:31:52Z-
dc.date.available2013-03-16T02:31:52Z-
dc.date.created2012-02-06-
dc.date.issued2000-05-28-
dc.identifier.citationProceedings of the IEEE 2000 Internaitonal Symposium on Circuits and Systems, v.1, no., pp. --
dc.identifier.issn0271-4310-
dc.identifier.urihttp://hdl.handle.net/10203/126512-
dc.languageENG-
dc.title670 ps, 64 bit dynamic low-power adder design-
dc.typeConference-
dc.identifier.scopusid2-s2.0-0033715995-
dc.type.rimsCONF-
dc.citation.volume1-
dc.citation.publicationnameProceedings of the IEEE 2000 Internaitonal Symposium on Circuits and Systems-
dc.identifier.conferencecountrySwitzerland-
dc.identifier.conferencecountrySwitzerland-
dc.contributor.localauthorYoo, Hoi-Jun-
dc.contributor.nonIdAuthorWoo, Ramchan-
dc.contributor.nonIdAuthorLee, Se-Joong-
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