Design of variable loop gains of dual-loop DPLL

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dc.contributor.authorChun, BJko
dc.contributor.authorLee, Yong-Hoonko
dc.contributor.authorKim, Bko
dc.date.accessioned2009-11-04T07:38:55Z-
dc.date.available2009-11-04T07:38:55Z-
dc.date.created2012-02-06-
dc.date.created2012-02-06-
dc.date.issued1997-12-
dc.identifier.citationIEEE TRANSACTIONS ON COMMUNICATIONS, v.45, no.12, pp.1520 - 1522-
dc.identifier.issn0090-6778-
dc.identifier.urihttp://hdl.handle.net/10203/12104-
dc.description.abstractAn approach to the derivation of variable loop gain sequences of dual-loop digital phase-locked loop (DPLL) [1] is developed based on some modifications of the Kalman filtering formulation, It is shown that optimal loop gain sequences which are independent of measurement noise statistics tan be obtained under a deterministic source model. Computer simulation results demonstrate that the adaptive dual-loop DPLL designed bu? using the proposed method is more robust to noise variations than the adaptive DPLL in [2].-
dc.languageEnglish-
dc.language.isoen_USen
dc.publisherIEEE-INST ELECTRICAL ELECTRONICS ENGINEERS INC-
dc.subjectACQUISITION-
dc.titleDesign of variable loop gains of dual-loop DPLL-
dc.typeArticle-
dc.identifier.wosidA1997YL46400007-
dc.identifier.scopusid2-s2.0-0031374449-
dc.type.rimsART-
dc.citation.volume45-
dc.citation.issue12-
dc.citation.beginningpage1520-
dc.citation.endingpage1522-
dc.citation.publicationnameIEEE TRANSACTIONS ON COMMUNICATIONS-
dc.embargo.liftdate9999-12-31-
dc.embargo.terms9999-12-31-
dc.contributor.localauthorLee, Yong-Hoon-
dc.contributor.localauthorKim, B-
dc.contributor.nonIdAuthorChun, BJ-
dc.type.journalArticleArticle-
dc.subject.keywordAuthordigital phase-locked loop-
dc.subject.keywordAuthordual-loop DPPL-
dc.subject.keywordAuthorKalman filter-
dc.subject.keywordAuthorvariable loop gain-
dc.subject.keywordPlusACQUISITION-
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