Optimal loop bandwidth design for low noise PLL applications
| DC Field | Value | Language |
|---|---|---|
| dc.contributor.author | Lim Kyoohyun | ko |
| dc.contributor.author | Choi Seunghee | ko |
| dc.contributor.author | Kim Beomsup | ko |
| dc.date.accessioned | 2013-03-15T06:39:59Z | - |
| dc.date.available | 2013-03-15T06:39:59Z | - |
| dc.date.created | 2012-02-06 | - |
| dc.date.created | 2012-02-06 | - |
| dc.date.issued | 1997-01-28 | - |
| dc.identifier.citation | Proceedings of the 1997 Asia and South Pacific Design Automation Conference, ASP-DAC, pp.425 - 428 | - |
| dc.identifier.uri | http://hdl.handle.net/10203/117055 | - |
| dc.language | English | - |
| dc.publisher | ASP-DAC | - |
| dc.title | Optimal loop bandwidth design for low noise PLL applications | - |
| dc.type | Conference | - |
| dc.identifier.wosid | A1996BJ06S00072 | - |
| dc.identifier.scopusid | 2-s2.0-0030716610 | - |
| dc.type.rims | CONF | - |
| dc.citation.beginningpage | 425 | - |
| dc.citation.endingpage | 428 | - |
| dc.citation.publicationname | Proceedings of the 1997 Asia and South Pacific Design Automation Conference, ASP-DAC | - |
| dc.identifier.conferencecountry | JA | - |
| dc.identifier.conferencelocation | Chiba, Jpn | - |
| dc.contributor.localauthor | Kim Beomsup | - |
| dc.contributor.nonIdAuthor | Lim Kyoohyun | - |
| dc.contributor.nonIdAuthor | Choi Seunghee | - |
- Appears in Collection
- RIMS Conference Papers
- Files in This Item
- There are no files associated with this item.
This item is cited by other documents in WoS
| ⊙ Detail Information in WoSⓡ | Click to see |  |
| ⊙ Cited 1 items in WoS | Click to see citing articles in |  |
Items in DSpace are protected by copyright, with all rights reserved, unless otherwise indicated.