DSpace at KOASAS: A new systolic array architecture for the OS CFAR processor

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College of Engineering(공과대학)School of Electrical Engineering(전기및전자공학부)EE-Conference Papers(학술회의논문)

A new systolic array architecture for the OS CFAR processor

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Song, J. P. / Han, D. S. / Lee, Hwang Soo researcher / Youn, D. H.

Publisher: Radar 92

Issue Date: 1992-10

Language: ENG

Citation: Radar 92, pp.526 - 529

URI: http://hdl.handle.net/10203/113122

Appears in Collection: EE-Conference Papers(학술회의논문)

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A new systolic array architecture for the OS CFAR processor

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