Subthreshold MOS implementation of neural networks with on-chip error back-propagation learning

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dc.contributor.authorChoi, Yoon Kyung-
dc.contributor.authorLee, Soo-Young-
dc.date.accessioned2013-03-14T09:47:52Z-
dc.date.available2013-03-14T09:47:52Z-
dc.date.created2012-02-06-
dc.date.issued1993-10-25-
dc.identifier.citationProceedings of 1993 International Joint Conference on Neural Networks. Part 1 (of 3), v.1, no., pp.849 - 852-
dc.identifier.urihttp://hdl.handle.net/10203/107542-
dc.languageENG-
dc.titleSubthreshold MOS implementation of neural networks with on-chip error back-propagation learning-
dc.typeConference-
dc.identifier.scopusid2-s2.0-0027874103-
dc.type.rimsCONF-
dc.citation.volume1-
dc.citation.beginningpage849-
dc.citation.endingpage852-
dc.citation.publicationnameProceedings of 1993 International Joint Conference on Neural Networks. Part 1 (of 3)-
dc.identifier.conferencecountryJapan-
dc.identifier.conferencecountryJapan-
dc.contributor.localauthorLee, Soo-Young-
dc.contributor.nonIdAuthorChoi, Yoon Kyung-
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EE-Conference Papers(학술회의논문)
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