Low-power Log-MAP decoding based on reduced metric memory access

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dc.contributor.authorLee, DSko
dc.contributor.authorPark, In-Cheolko
dc.date.accessioned2007-08-09T06:50:36Z-
dc.date.available2007-08-09T06:50:36Z-
dc.date.created2012-02-06-
dc.date.created2012-02-06-
dc.date.issued2006-06-
dc.identifier.citationIEEE TRANSACTIONS ON CIRCUITS AND SYSTEMS I-REGULAR PAPERS, v.53, no.6, pp.1244 - 1253-
dc.identifier.issn1549-8328-
dc.identifier.urihttp://hdl.handle.net/10203/1005-
dc.description.abstractDue to the powerful error correcting performance, turbo codes have been adopted in many wireless communication standards such as W-CDMA and CDMA2000. Although several low-power techniques have been proposed, power consumption is still a major issue to be solved in practical implementations. Since turbo decoding is classified as a memory-intensive algorithm, reducing memory accesses is crucial to achieve a low power design. To reduce the number of memory accesses for maximum a posteriori (MAP) decoding, this paper proposes an approximate reverse calculation method that can be implemented with simple arithmetic operations such as addition and comparison. Simulation results show that the proposed method applied to the W-CDMA standard reduces the access rate of the backward metric memory by 87% without degrading error-correcting performance. A prototype log-MAP decoder based on the proposed reverse calculation achieves 29% power reduction compared to a conventional decoder that does not use the reverse calculation.-
dc.description.sponsorshipThis work was supported in part by the Institute of Information Technology Assessment through the ITRC, by the Korea Science and Engineering Foundation through MICROS center and by IC Design Education Center.en
dc.languageEnglish-
dc.language.isoen_USen
dc.publisherIEEE-INST ELECTRICAL ELECTRONICS ENGINEERS INC-
dc.subjectTURBO-
dc.subjectCODES-
dc.subjectCMOS-
dc.titleLow-power Log-MAP decoding based on reduced metric memory access-
dc.typeArticle-
dc.identifier.wosid000238426900006-
dc.identifier.scopusid2-s2.0-33747059650-
dc.type.rimsART-
dc.citation.volume53-
dc.citation.issue6-
dc.citation.beginningpage1244-
dc.citation.endingpage1253-
dc.citation.publicationnameIEEE TRANSACTIONS ON CIRCUITS AND SYSTEMS I-REGULAR PAPERS-
dc.identifier.doi10.1109/TCSI.2006.870901-
dc.embargo.liftdate9999-12-31-
dc.embargo.terms9999-12-31-
dc.contributor.localauthorPark, In-Cheol-
dc.contributor.nonIdAuthorLee, DS-
dc.type.journalArticleArticle-
dc.subject.keywordAuthorlow power design-
dc.subject.keywordAuthormaximum a posteriori (MAP) algorithm-
dc.subject.keywordAuthormemory optimization-
dc.subject.keywordAuthorreverse calculation-
dc.subject.keywordAuthorturbo codes-
dc.subject.keywordAuthorturbo decoding-
dc.subject.keywordPlusTURBO-
dc.subject.keywordPlusCODES-
dc.subject.keywordPlusCMOS-
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