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BIST Methodology, Architecture and Circuits for Pre-Bond TSV Testing in 3D Stacking IC Systems Wang, Chao; Zhou, Jun; Weerasekera, Roshan; Zhao, Bin; Liu, Xin; Royannez, Philippe; Je, Minkyu, IEEE TRANSACTIONS ON CIRCUITS AND SYSTEMS I-REGULAR PAPERS, v.62, no.1, pp.139 - 148, 2015-01 |
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