Showing results 1 to 2 of 2
Charge trapping and breakdown mechanism in HfAIO/TaN gate stack analyzed using carrier separation Loh, WY; Cho, Byung Jin; Joo, MS; Li, MF; Chan, DSH; Mathew, S; Kwong, DL, IEEE TRANSACTIONS ON DEVICE AND MATERIALS RELIABILITY, v.4, no.4, pp.696 - 703, 2004-12 |
Ultra-thin High-K Dielectrics for memory and logic device applications = 메모리 및 로직 소자용 고유전체 박막에 관한 연구link Shin, Yun-Sang; 신윤상; et al, 한국과학기술원, 2014 |
Discover