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Showing results 214601 to 214620 of 279418

214601
VLSI architecture of List Sphere Decoder

Kim H.-S.; Seo S.-H.; Park, Sin Chong, 9th International Conference on Advanced Communication Technology, ICACT 2007, v.3, pp.1693 - 1696, 2007-02-12

214602
VLSI architectures for the wavelet-based video coding system = 웨이블릿 기반 비디오 코딩 시스템을 위한 VLSI 구조link

Baek, Yun-Ju; 백윤주; et al, 한국과학기술원, 1997

214603
VLSI Chips for Intelligent Speech Acquisition and Information Extraction based on Human Auditory Models

Lee, Soo-Young, International Conference on Information Acquisition, pp.0 - 0, 2004-06

214604
VLSI design using redundant binary number system : arithmetic components for floating-point datapath unit = 잉여 이진수 시스템을 이용한 VLSI 시스템 설계 : 부동소수점 연산기로의 적용link

Han, Kyung-Nam; 한경남; et al, 한국과학기술원, 2002

214605
VLSI Implementaion of Radial Basis Fuction Network with Learning Capability

Choi, Y.K.; Cho, J.; Lee, Soo-Young, International Conference on Neural Information Processing, pp.1341 - 1346, 1995-10

214606
VLSI implementation for high-throughput turbo decoder with parallel architecture = 병렬 구조를 가지는 고속 터보 디코드의 VLSI 구현link

Kwak, Jae-Young; 곽재영; et al, 한국과학기술원, 2003

214607
VLSI Implementation for Interpolation-based Matrix Inversion for 802.11n Receivers

Park, Sin Chong, ITC-CSCC2007

214608
VLSI Implementation for Interpolation-based Matrix Inversion for MIMO-OFDM Receivers

Park, Sin Chong, WSEAS

214609
VLSI implementation of area-efficient list sphere decoder

Lee S.; Lee J.; Park, Sin Chong, 2006 International Conference on Communication Technology, ICCT '06, 2006-11-27

214610
VLSI Implementation of Area-efficient List Sphere Decoder

Park, Sin Chong, ISPACS 2006

214611
VLSI implementation of ATM layer functions for ATM UNI/NNI

Choi, SH; Kim, YS; Han, YM; Park, Hong-Shik, ITC-CSCC, v.49, no.6, pp.269 - 273, 대한전자공학회, 1996

214612
VLSI implementation of decoder for decompressing fractal-based compressed image

Kim, KH; Hong, CY; Kim, Lee-Sup, Proceedings of the 1998 IEEE International Symposium on Circuits and Systems, ISCAS. Part 5 (of 6), pp.221 - 224, IEEE, 1998-05-31

214613
VLSI Implementation of List Sphere Decode

Park, Sin Chong, ICCCA 2006

214614
VLSI Implementation of List Sphere Decoder

Park, Sin Chong, ITC-CSCC2006

214615
VLSI Implementation of Multi-Layer Bidirectional Associative Memory

Choi, Y.K.; Jeong, D.G.; Lee, Soo-Young, 2nd Annual Meeting of Korean Neural Network Study Group, 1991-06

214616
VLSI implementation of neural network with on-chip learning capability = 학습능력을 가지는 신경회로망의 VLSI 구현link

Choi, Yoon-Kyung; 최윤경; et al, 한국과학기술원, 1996

214617
VLSI implementation of Phong shader in 3D graphics

Sin, HC; Lee, JA; Kim, Lee-Sup, Proceedings of the 1998 IEEE International Symposium on Circuits and Systems, ISCAS. Part 5 (of 6), pp.417 - 420, IEEE, 1998-05-31

214618
VLSI Implementation of Radial Basis Function Network with Learning Capability

Lee, Soo-Young, Int. Conf. on Neural Information, pp.1341 - 1346, ICONIP, 1994-10

214619
VLSI implementation of the real value based list sphere decoder(LSD) for the MIMO wireless communication system = 다중 입추력 무선 통신 시스템을 위한 real value 기반 list sphere decoder(LSD)의 VLSI 설계link

Seo, Sang-Ho; 서상호; et al, 한국정보통신대학교, 2006

214620
VLSI Implementation of Tree Searching Logic in List Sphere Decoder

Park, Sin Chong, ICWMMN 2006

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