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Showing results 1421 to 1440 of 109491
| A 2.4-GHz reference doubled fractional-N PLL with dual phase detector in 0.13-um CMOS Lee, W.; Cho, SeongHwan, 2010 IEEE International Symposium on Circuits and Systems: Nano-Bio Circuit Fabrics and Systems, ISCAS 2010, pp.1328 - 1331, IEEE, 2010-05-30 |
| A 2.4-GHz sub-mW CMOS current-reused receiver front-end for wireless sensor network Song, T.; Oh, H.-S.; Baek, S.-H.; Hong, Songcheol; Yoon, E., 2006 IEEE Radio Frequency Integrated Circuits Symposium, pp.293 - 296, IEEE, 2006-06-11 |
| A 2.4-GHz Sub-mW frequency source with current-reused frequency multiplier Song, T.; Oh, H.-S.; Yang, J.; Yoon, E.; Hong, Songcheol, 2006 IEEE Radio Frequency Integrated Circuits Symposium, pp.37 - 40, IEEE, 2006-06-11 |
| A 2.4/5.25 GHz CMOS Dual-band Low Noise Amplifier with Filtering Characteristics Kim, Eun-Hee; Hwang, Yong-Seok; Yoo, Hyung Joun, ITC-CSCC 2007 (International Technical Conference on Circuits/Systems, Computers and Communications), pp.1423 - 1424, IEICE, 2007-07-10 |
| A 2.4GHz 1.5mW digital MDLL using pulse-width comparator and double injection technique in 28nm CMOS Kim, Hyunik; Cho, SeongHwan; Kim,Taeik; Park, Hojin; Kim, Yongjo, 2016 IEEE International Solid-State circuits Conference, pp.328 - 329, IEEE, 2016-02-03 |
| A 2.4GHz SiGe bipolar power amplifier with integrated diode linearizer for WLAN IEEE 802.11b/g applications Kim, J.H.; Kim, K.Y.; Park, Y.H.; Chung, Y.K.; Park, Chul Soon, 2006 IEEE Radio and Wireless Symposium, v.2006, pp.267 - 270, 2006-01-17 |
| A 2.4GHz ternary sequence spread spectrum OOK transceiver with harmonic spur suppression and dual-mode detection architecture for ULP wearable devices Kim, Seong Joong; Park, Chang Soon; Kim, Youngkyu; Yun, Seok-Ju; Hong, Young-Jun; Lee, Sang-Gug, 30th IEEE Symposium on VLSI Circuits, VLSI Circuits 2016, Institute of Electrical and Electronics Engineers Inc., 2016-06 |
| A 2.4GHz, −102dBm-sensitivity, 25kb/s, 0.466mW interference resistant BFSK multi-channel sliding-IF ULP receiver Seok, Hyun-Gi; Jung, Oh-Yong; Dissanayake Anjana; Lee, Sang-Gug, 2017 Symposium on VLSI Circuits, IEEE, 2017-06 |
| A 2.4GHz,-102dBm-Sensitivity, 25kb/s, 0.466mW Interference Resistant BFSK Multi-Channel Sliding-IF ULP Receiver Seok, Hyun-Gi; Jung, Oh-Yong; Anjana Dissanayake; Lee, Sang-Gug, 23rd Asia and South Pacific Design Automation Conference (ASP-DAC), pp.319 - 320, IEEE, 2018-01 |
| A 2.4pJ/bit, 6.37Gb/s SPC-enhanced BC-BCH decoder in 65nm CMOS for NAND flash storage systems Jung, Jaehwan; Park, In-Cheol; Lee, Youngjoo, 23rd Asia and South Pacific Design Automation Conference (ASP-DAC), pp.329 - 330, IEEE, 2018-01 |
| A 2.4uW 400nC/s constant charge injector for wirelessly-powered electro-acupuncture Lee, H.; Song, K.; Yan, L.; Yoo, Hoi-Jun, 2011 IEEE International Symposium of Circuits and Systems, ISCAS 2011, pp.1716 - 1719, IEEE, 2011-05-15 |
| A 2.5-Gb/s DWDM system using directly modulated RSOA with RZ modulation format Tran, Quoc-Hoai; Lee, Chang-Hee, Photonics Conference 2016(광자기술학술회의), 한국광학회, 2016-12-01 |
| A 2.5-Gb/s per Channel DWDM-PON with a Pulsed-ASE Seed Light Source Tran, Quoc Hoai; Yoo, Sang Hwa; Moon, Sang Rok; Lee, Chang Hee, IEEE Photonics Conference, IEEE Photonics Conference, 2015-10-05 |
| A 2.5-GHz 860uW charge-recycling fractional-N frequency synthesizer in 130nm CMOS Park, D.; Lee, W.; Jeon, S.; Cho, SeongHwan, 2008 Symposium on VLSI Circuits Digest of Technical Papers, VLSIC, pp.82 - 83, 2008-06-18 |
| A 2.54μJ∙ppm2-FOMS Supply- and Temperature-Independent Time-Locked ΔΣ Capacitance-to-Digital Converter in 0.18-μm CMOS Baik, Seungyeob; Seol, Taeryoung; Lee, Sehwan; Kim, Geunha; Cho, SeongHwan; George, Arup K.; Lee, Junghyup, 2022 IEEE Symposium on VLSI Technology and Circuits, VLSI Technology and Circuits 2022, pp.114 - 115, Institute of Electrical and Electronics Engineers Inc., 2022-06 |
| A 2.5Gb/s CMOS transimpedance amplifier using a novel active inductor load Oh, YH; Lee, SG; Park, HyoHoon, 27th ESSCIRC (European Solid-State Circuits Conference), v.0, no.0, pp.178 - 181, 2001-09-18 |
| A 2.5mW 12MHz-BW 69dB SNDR Passive Bandpass ΔΣ ADC with Highpass Noise-Shaping SAR Quantizers Oh, Sein; Park, Seunga; Jung, Yoontae; Koo, Jimin; Cho, Donghee; Ha, Sohmyung; Je, Minkyu, 2023 IEEE Symposium on VLSI Technology and Circuits (VLSI Technology and Circuits), IEEE, 2023-06-11 |
| A 2.6 GHz Low Phase-Noise VCO Monolithically Integrated with High Q MEMS Inductors Park, E.; Yoon, Jun-Bo; Hong, S.; Yoon, E., 28th European Solid-State Circuits Conference, pp.143 - 146, 2002-09 |
| A 2.69uW Dual Quantization-based Capacitance-to-Digital Converter for Pressure, Humidity, and Acceleration Sensing in 0.18um CMOS Park, Sujin; Lee, Geon-Hwi; Cho, SeongHwan, Conference on Optical and Infrared Interferometry and Imaging VII, pp.163 - 164, IEEE, 2018-06-20 |
| A 2.6b/cycle-Architecture-Based 10b 1.7GS/s 15.4mW 4x-Time-Interleaved SAR ADC with a Multistep Hardware-Retirement Technique Hong, Hyeok-Ki; Kang, HW; Jo, DS; Lee, DS; You, YS; Lee, YH; Park, HJ; et al, International Solid-State Circuits Conference (ISSCC), IEEE, 2015-02-25 |
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