DC Field | Value | Language |
---|---|---|
dc.contributor.author | Kim, Gun Hwan | ko |
dc.contributor.author | Ju, Hyunsu | ko |
dc.contributor.author | Yang, Min Kyu | ko |
dc.contributor.author | Lee, Dong Kyu | ko |
dc.contributor.author | Choi, Ji Woon | ko |
dc.contributor.author | Jang, Jae Hyuck | ko |
dc.contributor.author | Lee, Sang Gil | ko |
dc.contributor.author | Cha, Ik Su | ko |
dc.contributor.author | Park, Bo Keun | ko |
dc.contributor.author | Han, Jeong Hwan | ko |
dc.contributor.author | Chung, Taek-Mo | ko |
dc.contributor.author | Kim, Kyung Min | ko |
dc.contributor.author | Hwang, Cheol Seong | ko |
dc.contributor.author | Lee, Young Kuk | ko |
dc.date.accessioned | 2018-02-21T05:10:44Z | - |
dc.date.available | 2018-02-21T05:10:44Z | - |
dc.date.created | 2018-01-22 | - |
dc.date.created | 2018-01-22 | - |
dc.date.created | 2018-01-22 | - |
dc.date.issued | 2017-10 | - |
dc.identifier.citation | SMALL, v.13, no.40 | - |
dc.identifier.issn | 1613-6810 | - |
dc.identifier.uri | http://hdl.handle.net/10203/239953 | - |
dc.description.abstract | The quadruple-level cell technology is demonstrated in an Au/Al2O3/HfO2/TiN resistance switching memory device using the industry-standard incremental step pulse programming (ISPP) and error checking/correction (ECC) methods. With the highly optimistic properties of the tested device, such as self-compliance and gradual set-switching behaviors, the device shows 6s reliability up to 16 states with a state current gap value of 400 nA for the total allowable programmed current range from 2 to 11 mu A. It is demonstrated that the conventional ISPP/ECC can be applied to such resistance switching memory, which may greatly contribute to the commercialization of the device, especially competitively with NAND flash. A relatively minor improvement in the material and circuitry may enable even a five-bits-per-cell technology, which can hardly be imagined in NAND flash, whose state-of-the-art multiple-cell technology is only at three-level (eight states) to this day. | - |
dc.language | English | - |
dc.publisher | WILEY-V C H VERLAG GMBH | - |
dc.subject | THERMAL AGITATION | - |
dc.subject | NAND FLASH | - |
dc.subject | MEMORY | - |
dc.subject | ARCHITECTURE | - |
dc.subject | CONDUCTORS | - |
dc.subject | DIODE | - |
dc.subject | COST | - |
dc.title | Four-Bits-Per-Cell Operation in an HfO2-Based Resistive Switching Device | - |
dc.type | Article | - |
dc.identifier.wosid | 000413416400006 | - |
dc.identifier.scopusid | 2-s2.0-85032855933 | - |
dc.type.rims | ART | - |
dc.citation.volume | 13 | - |
dc.citation.issue | 40 | - |
dc.citation.publicationname | SMALL | - |
dc.identifier.doi | 10.1002/smll.201701781 | - |
dc.contributor.localauthor | Kim, Kyung Min | - |
dc.contributor.nonIdAuthor | Kim, Gun Hwan | - |
dc.contributor.nonIdAuthor | Ju, Hyunsu | - |
dc.contributor.nonIdAuthor | Yang, Min Kyu | - |
dc.contributor.nonIdAuthor | Lee, Dong Kyu | - |
dc.contributor.nonIdAuthor | Choi, Ji Woon | - |
dc.contributor.nonIdAuthor | Jang, Jae Hyuck | - |
dc.contributor.nonIdAuthor | Lee, Sang Gil | - |
dc.contributor.nonIdAuthor | Cha, Ik Su | - |
dc.contributor.nonIdAuthor | Park, Bo Keun | - |
dc.contributor.nonIdAuthor | Han, Jeong Hwan | - |
dc.contributor.nonIdAuthor | Chung, Taek-Mo | - |
dc.contributor.nonIdAuthor | Hwang, Cheol Seong | - |
dc.contributor.nonIdAuthor | Lee, Young Kuk | - |
dc.description.isOpenAccess | N | - |
dc.type.journalArticle | Article | - |
dc.subject.keywordPlus | THERMAL AGITATION | - |
dc.subject.keywordPlus | MEMORY | - |
dc.subject.keywordPlus | DIODE | - |
dc.subject.keywordPlus | COST | - |
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