DC Field | Value | Language |
---|---|---|
dc.contributor.author | Gao, Fei | ko |
dc.contributor.author | Lee, S. J. | ko |
dc.contributor.author | Rui, Li | ko |
dc.contributor.author | Cho, Byung Jin | ko |
dc.contributor.author | Balakumar, S. | ko |
dc.contributor.author | Tung, Chih-Hang | ko |
dc.contributor.author | Chi, D. Z. | ko |
dc.contributor.author | Kwong, D. L. | ko |
dc.date.accessioned | 2013-03-07T02:10:48Z | - |
dc.date.available | 2013-03-07T02:10:48Z | - |
dc.date.created | 2012-02-06 | - |
dc.date.created | 2012-02-06 | - |
dc.date.issued | 2006-05 | - |
dc.identifier.citation | ELECTROCHEMICAL AND SOLID STATE LETTERS, v.9, no.7, pp.222 - 224 | - |
dc.identifier.issn | 1099-0062 | - |
dc.identifier.uri | http://hdl.handle.net/10203/89186 | - |
dc.description.abstract | We demonstrate high Ge percentage thin silicon germanium on insulator (SGOI) p-channel metal-oxide-semiconductor field-effect transistor (MOSFET) using Ni-germanosilicide Schottky source/drain (S/D) and HfO2/TaN gate stack integrated with conventional self-aligned top gate process. Unlike high-temperature S/D activation needed for conventional transistor, low Ni-germanosilicide S/D formation temperature contributes to the excellent capacitance-voltage characteristic and low gate leakage current. SGOI structure suppresses the junction leakage problem, resulting in good agreement between the source current and drain current. In addition, extracted peak hole mobility is comparable to that of conventional bulk Ge p-MOSFET with HfO2/TaN gate stack. (c) 2006 The Electrochemical Society. | - |
dc.language | English | - |
dc.publisher | ELECTROCHEMICAL SOC INC | - |
dc.subject | GE-ON-INSULATOR | - |
dc.subject | HIGH-KAPPA GATE | - |
dc.subject | METAL-GATE | - |
dc.subject | GERMANIUM | - |
dc.subject | FABRICATION | - |
dc.subject | S/D | - |
dc.title | SiGe on insulator MOSFET integrated with Schottky source/drain and HfO2/TaN gate stack | - |
dc.type | Article | - |
dc.identifier.wosid | 000237682300025 | - |
dc.identifier.scopusid | 2-s2.0-33646873772 | - |
dc.type.rims | ART | - |
dc.citation.volume | 9 | - |
dc.citation.issue | 7 | - |
dc.citation.beginningpage | 222 | - |
dc.citation.endingpage | 224 | - |
dc.citation.publicationname | ELECTROCHEMICAL AND SOLID STATE LETTERS | - |
dc.identifier.doi | 10.1149/1.2197127 | - |
dc.contributor.localauthor | Cho, Byung Jin | - |
dc.contributor.nonIdAuthor | Gao, Fei | - |
dc.contributor.nonIdAuthor | Lee, S. J. | - |
dc.contributor.nonIdAuthor | Rui, Li | - |
dc.contributor.nonIdAuthor | Balakumar, S. | - |
dc.contributor.nonIdAuthor | Tung, Chih-Hang | - |
dc.contributor.nonIdAuthor | Chi, D. Z. | - |
dc.contributor.nonIdAuthor | Kwong, D. L. | - |
dc.type.journalArticle | Article | - |
dc.subject.keywordPlus | GE-ON-INSULATOR | - |
dc.subject.keywordPlus | HIGH-KAPPA GATE | - |
dc.subject.keywordPlus | METAL-GATE | - |
dc.subject.keywordPlus | GERMANIUM | - |
dc.subject.keywordPlus | FABRICATION | - |
dc.subject.keywordPlus | S/D | - |
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