An area-efficient and fully synthesizable Bluetooth baseband module for wireless communication

Abstract

In this paper, we describe the implementation and the test results of a Bluetooth baseband module we have developed. For small chip size, we eliminate FIFOs for data buffering between hardware functional units and data buffers for bit streaming among channel coding blocks. Furthermore, we carefully consider hardware and software partitioning. We implement complex control tasks of the Bluetooth baseband layer protocols in software running on an embedded microcontroller. Hardware-efficient functions, such as low-level bitstream link control; host controller interfaces (HCIs), such as universal asynchronous receiver transmitter (UART) and universal serial bus (USB) interfaces; and audio CODEC are performed by dedicated hardware blocks. In addition, the bitstream data path block of the link controller constructing the baseband module has been designed by considering low power. The design of the baseband module is done using fully synthesizable Verilog HDL to enhance the portability between process technologies. A field programmable gate array (FPGA) implementation of the module was tested for functional verification and real time operation of file and bitstream transfer between PCs. The module was also fabricated in a 0.25 mum CMOS technology, the core size of which is only 2.79 x 2.80 mm(2).