A New Approach to the Multiport Memory Allocation Problem in Data Path Synthesis

Abstract

A new approach to the problem of allocation of multiport memory modules for data storage in data path synthesis is presented. Previous approaches solve the allocation problem in two separate steps: (i) grouping the variables (or registers) to form memory modules and (ii) determining the interconnections between the memory modules and functional units. Yet, there is no easy way to predict the result of step (ii) during step (i). In our approach, we place primary importance on the cost of interconnections. Consequently, we try to minimize the cost of interconnections first and then to group the variables to form memory modules later. For a number of benchmark problems, it was demonstrated that this approach is quite effective and produces very good solutions to the allocation problem for multiport-memory-based architecture.