Design of a fully-integrated 5GHz differentially-tuned CMOS LC VCO for half-rate 10Gb/s clock and data recovery표준 0.18㎛ CMOS 공정을 이용한 half-rate 10Gb/s CDR용 전압제어 주파수발생기의 설계에 관한 연구

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In this thesis, a fully-integrated 5GHz differentially-tuned CMOS LC voltage controlled oscillator (VCO) for a half-rate 10Gb/s clock and data recovery (CDR), is designed and analyzed. The designed VCO has the feature of simple LC tank which gives high VCO performance. By using differentially-tunable voltage control topology, high frequency tuning range and ideal tuning linearity could be obtained. The proposed 5GHz VCO had wide tuning range, super tuning linearity and low phase noise performances for half-rate 10Gb/s CDR applications and the TSMC 0.18$\mum$ CMOS technology was used for integrated circuits (IC) design. In order to verify its operation after IC fabrication, the designed IC was simulated under the various realistic environments: temperature and process variations. The VCO has the principal designed specifications of -135dBc/Hz @ 1MHz offset frequency and 4.25GHz~5.7GHz frequency tuning range (28%) in the simulation using the Cadence as a design tool.
Advisors
Lee, Man-Seopresearcher이만섭researcher
Description
한국정보통신대학교 : 공학부,
Publisher
한국정보통신대학교
Issue Date
2004
Identifier
392351/225023 / 020024056
Language
eng
Description

학위논문(석사) - 한국정보통신대학교 : 공학부, 2004, [ 55 p. ]

Keywords

Design; CMOS LC VCO; Fully-integrated 5GHz

URI
http://hdl.handle.net/10203/55267
Link
http://library.kaist.ac.kr/search/detail/view.do?bibCtrlNo=392351&flag=dissertation
Appears in Collection
School of Engineering-Theses_Master(공학부 석사논문)
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