In this dissertation, the super-iterative LDPC-coded MIMO-OFDM system is analyzed, designed and implemented as a target system. The receiver performance and the low-power designing techniques are summarized and applied. Based on the Monte-Carlo simulation results, the throughput of the target system is evaluated for different system parameters such as the modulation order, number of antennas, and receiver configurations. The receiver configurations including the MIMO detection scheme, LDPC decoding scheme, and number of iterations are analyzed. The simulation results show that the throughput can be enhanced when the modulation order grows with a SNR at the receiver side and a larger number of antennas are utilized. Furthermore, it is found that using iterative detection and decoding with sufficiently large number of iterations, more than 4 iterations, increase the throughput. The extracted parameters by system simulation are applied to actual hardware design. Moreover, the low-power digital hardware design techniques, such as clock gating, operand isolation, and low-power cell replacement, are analyzed and applied to the designed system. By these techniques, total power reduction of 80 % is achieved.