A complementary colpitts oscillator and phase noise optimization = CMOS 공정을 이용한 complementary colpitts oscillator와 phase noise 최적화

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The oscillation performances of integrated CMOS VCOs become more important with the competitive development of wireless CMOS SOC(System-On-Chip) products. Even though CMOS process technology advances in operation frequency, the higher 1/f noise and hot-carrier noise of transistor make more difficult design high performance CMOS VCOs. For the design and optimization of integrated VCO using sub-micron CMOS process technology for wireless communication, this thesis releases three subjects, complementary Colpitts oscillator, asymmetric capacitance tank structure, and suppression of 1/f noise up-conversion with resistor damping, in Section III, IV and V, respectively. In Section III for the better oscillation performances, a new compact complementary Colpitts oscillator topology in CMOS technology is introduced that is effectively composed of two components, a complementary N- & P-MOS transistor pair and an inductor, and requires no additional circuits for bias and buffer interfaces and the oscillation mechanism as a one-port model is analyzed. Based on the one-port analysis and the existing LTV phase noise model, the phase noise equation of the proposed complementary Colpitts oscillator is derived as the function of oscillation frequency, Q-factor of tank circuit and bias current. The phase noise equation provides the design guideline to optimize the phase noise of the proposed Colpitts oscillator, of which the property is proven with simulation and measurement results. The proposed Colpitts VCOs are fabricated using 0.35 $\mum$ CMOS technology for 2, 5, 6, and 10 GHz bands. Measurement shows that the phase noise is -118.1dBc at 1 MHz offset from 6 GHz oscillation while dissipating 4.6mA of current from 2.0V supply, which shows that the proposed complementary Colpitts oscillator has better oscillation performances than that of the conventional oscillators. In Section IV, a phase noise optimization method with asymmetric capacitance tank structure is proposed, w...
Advisors
Lee, Sang-Gugresearcher이상국researcher
Description
한국정보통신대학원대학교 : 공학부,
Publisher
한국정보통신대학교
Issue Date
2004
Identifier
392429/225023 / 020025357
Language
eng
Description

학위논문(박사) - 한국정보통신대학원대학교 : 공학부, 2004, [ ix, 110 p. ]

Keywords

Complementary Colpitts Oscillator; Phase Noise Optimization

URI
http://hdl.handle.net/10203/54535
Link
http://library.kaist.ac.kr/search/detail/view.do?bibCtrlNo=392429&flag=dissertation
Appears in Collection
School of Engineering-Theses_Ph.D(공학부 박사논문)
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