3D Simulator of integrated single-wafer processing tools

Abstract

Semiconductor manufacturing equipments are being integrated into complex systems that perform multiple processes in a single unit in harmony with other support systems. An integrated single-wafer processing tool, composed of several single wafer processing modules, transfer robots, and load locks, has complex revisitation sequences, and often has critical post-processing residency constraints at process modules. Scheduling of these tools is an intricate problem, and testing schedulers with real tools requires too much time and cost. The Single Wafer Processor simulator presented in this thesis is to verify an online scheduler, and evaluate performance of integrated single-wafer processing tools before the scheduler is actually deployed into real systems. The data transfer between the scheduler and the simulator is carried out with TCP/IP communication using messages and files. The developed simulator consists of six modules, i.e., GUI (Graphic User Interface), emulator, execution system, module manager, analyzer, and 3D animator. The overall framework is built using Microsoft Visual C++, and the animator is embodied using OpenGL API (Application Programming Interface). The emulator has the state models of the process and transfer modules, and control functions which execute a unit process of robots. The module manager checks the states of robots, and sequentially calls these control functions to accomplish a transfer command. And the manager module also updates the states of each module. Execution system automatically generates contingencies with given failure lists, and determines whether the rests of operable wafers should be processed. The animator performs real time 3D animation. The analyzer provides various performance measures such as throughput rate, cycle time, utility, etc. Users can test various scenarios and configurations of machines and recipes.