Fabrication of GaAs MESFET with recessed gate structure

Abstract

In this thesis, the fabrication methods of GaAs MESFET with recessed gate structure on VPE grown wafers were presented. After source and drain ohmic contacts, the active layer was chemically etched to the thickness below $2000 \mbox{\AA}$. The active layer thickness was controlled by monitoring the resistance between source and drain during etching. As a result of the channel etching, the depletion mode and enhancement mode FET were fabricated. And the breakdown voltage between gate and drain was increased.