(A) hierarchical schematic capture system for VLSI designVLSI 설계를 위한 계층적인 개략도 인식 시스템

Cited 0 time in webofscience Cited 0 time in scopus
  • Hit : 403
  • Download : 0
Program celled HIENA (Hierarchical Interactive Entry and Netlist Analysis) for schematic editing and extraction of electrical netlist has been developed to provide an integrated VLSI design environment based on EDIF under MS-DOS Version 3.0 on IBM PC AT. HIENA consists of three subprograms, SCHEMA, CONE, and HILINK; SCHEMA (SCHEMAtic editor) handles interactive schematic design entry and editing, and CONE (CONnectivity Extractor) extracts the connectivity information, i.e., netlist of each page drawn with SCHEMA, and HILINK (HIerarchical LINKer) is responsible for linking multiple pages with design hierarchy preserved and for providing the netlist information in EDIF format.
Advisors
Kyung, Chong-Minresearcher경종민researcher
Description
한국과학기술원 : 전기 및 전자공학과,
Publisher
한국과학기술원
Issue Date
1987
Identifier
65748/325007 / 000841185
Language
eng
Description

학위논문(석사) - 한국과학기술원 : 전기 및 전자공학과, 1987.2, [ 1책(면수복잡) ]

URI
http://hdl.handle.net/10203/39013
Link
http://library.kaist.ac.kr/search/detail/view.do?bibCtrlNo=65748&flag=dissertation
Appears in Collection
EE-Theses_Master(석사논문)
Files in This Item
There are no files associated with this item.

qr_code

  • mendeley

    citeulike


rss_1.0 rss_2.0 atom_1.0