2Multiplier-accumulator 를 이용한 고속 FFT 프로세서의 설계 및 구현Design and implementation of high speed FFT processor with 2 multiplier-accumulators

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dc.contributor.advisor이혁재-
dc.contributor.advisorLee, Hyuck-Jae-
dc.contributor.author최치주-
dc.contributor.authorChoi, Chi-Ju-
dc.date.accessioned2011-12-14T02:11:49Z-
dc.date.available2011-12-14T02:11:49Z-
dc.date.issued1986-
dc.identifier.urihttp://library.kaist.ac.kr/search/detail/view.do?bibCtrlNo=65265&flag=dissertation-
dc.identifier.urihttp://hdl.handle.net/10203/38971-
dc.description학위논문(석사) - 한국과학기술원 : 전기 및 전자공학과, 1986.8, [ [iii], 80 p. ]-
dc.languagekor-
dc.publisher한국과학기술원-
dc.title2Multiplier-accumulator 를 이용한 고속 FFT 프로세서의 설계 및 구현-
dc.title.alternativeDesign and implementation of high speed FFT processor with 2 multiplier-accumulators-
dc.typeThesis(Master)-
dc.identifier.CNRN65265/325007-
dc.description.department한국과학기술원 : 전기 및 전자공학과, -
dc.identifier.uid000841638-
dc.contributor.localauthor이혁재-
dc.contributor.localauthorLee, Hyuck-Jae-
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EE-Theses_Master(석사논문)
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