MPEG-2 to MPEG-4 transcoders on the pc and the TMS320C6416 DSP board = PC와 TMS320C6416 이산신호처리장치를 이용한 MPEG-2로부터 MPEG-4로 변환하는 압축기 구현

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Development of multimedia systems has had a major influence in the area of video coding, and the problem of interoperability is getting important for various networks and devices. Thus, devices such as gateways, multipoint control units, and servers must provide a seamless interaction between different formats. The video transcoding is one technology to make this possible. Transcoding can be defined as the conversion of one compressed coded signal to another compressed coded signal. A digital signal processor (DSP) is a type of microprocessor that is incredibly fast and powerful. A DSP provides optimal solution for communication and signal or image processing that need huge amount of computation. Among many applications, image and video have a great amount of data, so it must be compressed to transfer through a wire or wireless channel without any delay. In order for DSP to achieve fast operation with a limited memory, instruction level parallelism (ILP) structure should be designed. Superscalar or Very Long Instruction Word (VLIW) architecture makes parallel processing possible. The TMS320C6416 DSP board by Texas Instrument has VLIW DSP architecture enable to issue up to eight operations simultaneously at 600 MHz. This thesis compares MPEG-2 to MPEG-4 spatial-domain transcoder with MPEG-2 to MPEG-4 transform-domain transcoder that are implemented on the PC (Pentium4, 2.2GHz) and the TMS320C6416 (C6416) DSP board. Both transcoders reduce spatial resolution by half. Furthermore, in the encoder, motion estimation is deleted for fast transcoding. Instead, decoded information in the MPEG-2 decoder replaces motion estimation. For fair comparison, all modules except down sampling and motion compensation that feature transcoding architecture are implemented identically. These modules include mode decision, motion vector selection, variable length decoding, variable length encoding, quantization and inverse quantization. On the C6416 DSP board, besides implementation ...
Advisors
Park, Hyun-Wookresearcher박현욱researcher
Description
한국과학기술원 전기및전자공학전공,
Publisher
한국과학기술원
Issue Date
2004
Identifier
240433/325007  / 020023356
Language
eng
Description

학위논문(석사) - 한국과학기술원 전기및전자공학전공, 2004.8, [ vi, 52 p. ]

Keywords

GLASS; DOWN SAMPLINGLTER; MOTION COMPENSATION; TRANSCODER; POLYMERPTION; DEVS 형식론; 폴리머기술; 다운 샘플링; 움직임 보상; 변환 압축기; DEVS FORMALISM

URI
http://hdl.handle.net/10203/37820
Link
http://library.kaist.ac.kr/search/detail/view.do?bibCtrlNo=240433&flag=dissertation
Appears in Collection
EE-Theses_Master(석사논문)
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