상위 수준 합성에서의 하드웨어 예측기 구현 = Hardware estimator in high-level synthesis

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dc.contributor.advisor황승호-
dc.contributor.advisorHwang, Seung-Ho-
dc.contributor.author이기택-
dc.contributor.authorLee, Ki-Taek-
dc.date.accessioned2011-12-14T01:40:17Z-
dc.date.available2011-12-14T01:40:17Z-
dc.date.issued1997-
dc.identifier.urihttp://library.kaist.ac.kr/search/detail/view.do?bibCtrlNo=114238&flag=dissertation-
dc.identifier.urihttp://hdl.handle.net/10203/36939-
dc.description학위논문(석사) - 한국과학기술원 : 전기및전자공학과, 1997.2, [ vi, 49 p. ]-
dc.languagekor-
dc.publisher한국과학기술원-
dc.subject하드웨어 예측-
dc.subject상위수준 합성-
dc.subjectHigh-level synthesis-
dc.subjectHardware estimation-
dc.title상위 수준 합성에서의 하드웨어 예측기 구현 = Hardware estimator in high-level synthesis-
dc.typeThesis(Master)-
dc.identifier.CNRN114238/325007-
dc.description.department한국과학기술원 : 전기및전자공학과, -
dc.identifier.uid000953401-
dc.contributor.localauthor황승호-
dc.contributor.localauthorHwang, Seung-Ho-
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EE-Theses_Master(석사논문)
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