This thesis proposes a dual gain wideband LNA with high linearity for D-TV tuner application. Before explaining proposed LNA, the fundamental and general consideration of wideband LNA is reviewed. The explanation of issues and previous research of wideband LNA also included in the review.
The proposed LNA is designed by adopting linearization technique using PMOS transistor to a feed-forward noise cancelling structure and the LNA simultaneously achieved high linearity and low noise figure over a wide frequency band. In addition, the LNA offers two-step gain control to adjust the output power level.
For the frequency range of 48 to 860MHz, the post-layout simulation shows the power gain of 11~12dB, noise figure of less than 2.54dB and IIP3 of +7.1 to 13dBm. Designed in 65nm CMOS technology, the LNA consumes 19.4mA from 1.2V supply and the chip area is 0.56x0.62 $mm^2 $including pads.