In this thesis, a readout integrated Circuit (ROIC) for application in an amorphous silicon based micro-bolometer array is developed. This readout circuit was fabricated using a $0.35-\microm$ CMOS process for LWIR ($8-\microm~14-\microm$) IR detector array. The proposed circuit uses multiple integration method for high signal-to-noise ratio (SNR). The signal from each pixel is repeatedly sampled into the integration capacitors that are shared one capacitor with two pixels. After integration, the signal output and summed into summing capacitors with voltage skimming. At last the summed signals are output into memory that is out of ROIC chip. These procedures continue for n read cycles during frame time periodically. This method adopted in proposed ROIC provides more improved SNR by 2.91 times than conventional ROIC. Consequently, the proposed readout circuit that uses the multiple integration method has higher SNR than the conventional readout circuit that use the general integration method when these circuits are adopted the same microbolometer. This proposed readout circuit is very suitable in the high SNR IR image applications.