Reducing cache latency by combining addition and decoding = 가산과 디코딩의 통합을 이용한 캐시 시간지연의 감소에 관한 연구

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Advisors
Hwang, Seung-Horesearcher황승호researcher
Description
한국과학기술원 : 전기및전자공학과,
Publisher
한국과학기술원
Issue Date
1997
Identifier
114132/325007 / 000925275
Language
eng
Description

학위논문(박사) - 한국과학기술원 : 전기및전자공학과, 1997.2, [ xi, 100 p. ]

Keywords

Addition; Cache; Decoding; 디코딩; 가산; 캐시

URI
http://hdl.handle.net/10203/36373
Link
http://library.kaist.ac.kr/search/detail/view.do?bibCtrlNo=114132&flag=dissertation
Appears in Collection
EE-Theses_Ph.D.(박사논문)
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