A three dimensional device simulation program, KADES III-B, is developed to accurately analyze the deep submicron LDD MOSFET with a three dimensional structure. KADES III-B adopts FDM(Finite Difference Method) with Box Integration Method for the discretization. For the time efficient solution of large linear matrix equation, ILUCGS(Incomplete LU decomposition Conjugate Gradient Square) algorithm is used. In the Gummel routine, two damping functions are alternatively used to accelerate the convergence. For the accurate simulation of MOSFET``s, a new mobility model which considers surface roughness scattering, phonon scattering, impurity scattering and lateral field degradation is implemented. Using this program, the semidiagonal transistor, which is the pass transistor in the 64M DRAM unit memory cell, is analyzed. The voltage-current characteristics and the hot carrier stress immunity of the conventional LDD MOSFET and the semidiagonal transistor are compared. From the simulation and experimental results, the semidiagonal transistor has a slightly better current driving capability and hot carrier immunity. The former is due to the effectively wider channel width of the semidiagonal transistor. The latter is due to the fact that the point of maximum current density peak is different from that of peak electric field. With the aid of this program, the physical phenomena which are closely related to the extraction of the metallurgical effective channel length are analyzed. Based on this understandings, a new accurate extraction method of the metallurgical effective channel length is developed. This method has a clear physical basis and overcomes the two major problems, i.e. the resistance modulation in the lightly doped region by the gate bias and the spill-over effect by the charge sharing in the source/drain depletion region. By applying our method to the measured data, the practicalness is also verified. Our method is accurate and fast enough to be used for rout...