Optimal PWM map design for high power three-level inverter through comparative studies = 비교연구를 통한 대전력 3 단인버터의 최적 변조기 설계

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Adjustable speed control system of induction motor requires balanced three phase AC voltage source with both adjustable frequency and magnitude. Practically this can be implemented with power switching devices and PWM technology: so called inverter system. The three-level inverter is attractive over serial connection of devices and transformer coupling of conventional two-level inverters when high voltage/ high power inverter comes. The advantages includes good harmonic contents, switching frequency doubling and high voltage capability. No matter what PWM method is used, it must not allow to generate the narrow pulses under some hundred microseconds specified by manufactures. Otherwise it may result in the destruction of GTO device by hot spotting. Even though many PWM strategies have been proposed so far, there is few studies on composing optimal PWM map with existing PWM methods. However, ample care must be paid in composing PWM map because good harmonic performance must be drew in spite of low switching frequency of switching devices like GTO in high power system. Each PWM technique has both advantages and disadvantages according to regions they used. Thus proper choice becomes important in PWM map design. In this thesis, the mechanism of generating undesirable narrow pulses in conventional space vector PWM is revealed which using nearest three voltage vector close to command vector. Then, suggests two new space vector PWM method using non-nearest three and four vectors in low modulation index region to avoid such a narrow pulse problem. Comparative studies between elimination and optimal PWM strategy are given. Discussions on considerations to be paid in construction of PWM map are also given. An efficient and optimal PWM map for 1MVA rated GTO inverter for induction motor drive is suggested based on the comparative studies. The PWM map adapt space vector PWM suggested in this thesis, harmonic elimination and optimal PWM strategy in low, medium and high...
Advisors
Cho, Gyu-Hyeongresearcher조규형researcher
Description
한국과학기술원 : 전기및전자공학과,
Publisher
한국과학기술원
Issue Date
1995
Identifier
99082/325007 / 000895307
Language
eng
Description

학위논문(박사) - 한국과학기술원 : 전기및전자공학과, 1995.2, [ iv, 93 p. ]

URI
http://hdl.handle.net/10203/36261
Link
http://library.kaist.ac.kr/search/detail/view.do?bibCtrlNo=99082&flag=dissertation
Appears in Collection
EE-Theses_Ph.D.(박사논문)
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