Power bus design for high speed mixed mode system on package using embedded capacitor

Abstract

As multiple chips are being integrated into a single package with increased operating frequency, switching noise on power buses has become an important design issue in determining the system performance of a multi-layered package. To reduce the noise on power buses, embedded capacitor has been developed for power bus decoupling. Consequently, the need has arisen for an efficient method to analyze the performance of a power bus using embedded capacitor in a multi-layered package. This paper introduces an analytical modeling method to characterize various power bus structures using embedded capacitor in system on a package (SOP). The proposed method is based on a resonant cavity model for a rectangular cavity, a segmentation method, and lumped circuit models for non-planar structures. Using the analytical modeling method, the self- and transfer impedances of the power bus in the frequency domain and simultaneous switching noise waveform on the power bus in the time domain can be computed at arbitrary ports fast and accurately. Furthermore, the radiated emissions from the power bus can be calculated based on the proposed method without any prior measurement. For the verification of the proposed method, we fabricated test packages using embedded capacitor, and calculated results using the proposed modeling method were compared with the measured impedance parameters, simultaneous switching noise waveforms, and radiated fields.