DC Field | Value | Language |
---|---|---|
dc.contributor.advisor | Lee, Hwang-Soo | - |
dc.contributor.advisor | 이황수 | - |
dc.contributor.author | Kim, Jin-Yul | - |
dc.contributor.author | 김진율 | - |
dc.date.accessioned | 2011-12-14 | - |
dc.date.available | 2011-12-14 | - |
dc.date.issued | 1993 | - |
dc.identifier.uri | http://library.kaist.ac.kr/search/detail/view.do?bibCtrlNo=60582&flag=dissertation | - |
dc.identifier.uri | http://hdl.handle.net/10203/35705 | - |
dc.description | 학위논문(박사) - 한국과학기술원 : 전기 및 전자공학과, 1993.2, [ ix, 113 p. ] | - |
dc.description.abstract | The increasing demand of real-time processing in modern digital signal processing (DSP) applications requires a great deal of computing capabilities which can not be met using conventional single processor systems. A promising approach to satisfy this requirement is the parallel procession on multiprocessor systems, as there are many commercially available offthe-shelf high-performance digital signal processors. In order to process any problem on a multiprocessor system a scheduling method has to be developed, which consists of the two subproblems that are strongly inter-related: the time scheduling and processor assignment. In this work, we are concerned withe the development of a systematic methodology for mapping iterative DSP algorithms given as the data-flow graphs (DFGs) onto multiprocessor systems. In the conventional scheduling problems the tasks are computed only once and the objective of the scheduling is to minimize the schedule length. On the other hand, DSP algorithms are repeated infinitely many times in a periodic fashion. Therefore, the scheduling algorithm should be able to consider the overlapping of tasks between successive iterations. In addition, the particular properties of DSP applications allow the deterministic, static scheduling. The contributions of this work are as follows. First, the analysis methods for a given DFG are presented, which include the method for evaluating the iteration period bound and locating the critical cycle, and the method for analyzing the scheduling time space of each task. Second, two scheduling techniques which are applicable when the interprocessor communication delays are negligible with respect to the execution times of tasks are suggested. One is a formal approach based on the 0-1 integer linear programming formulation to obtain a schedule that uses the minimum number of processors. It is only useful for moderate sized problems, but we can formalize the scheduling problem efficiently with it. The other i... | eng |
dc.language | eng | - |
dc.publisher | 한국과학기술원 | - |
dc.title | Multiprocessor scheduling of iterative data-flow graphs for signal processing applications | - |
dc.title.alternative | 신호처리 응용을 위한 반복 데이타흐름 그래프의 다중프로세서 스케줄링 | - |
dc.type | Thesis(Ph.D) | - |
dc.identifier.CNRN | 60582/325007 | - |
dc.description.department | 한국과학기술원 : 전기 및 전자공학과, | - |
dc.identifier.uid | 000865103 | - |
dc.contributor.localauthor | Lee, Hwang-Soo | - |
dc.contributor.localauthor | 이황수 | - |
Items in DSpace are protected by copyright, with all rights reserved, unless otherwise indicated.