학위논문(박사) - 한국과학기술원 : 전기및전자공학전공, 2006.2, [ viii, 83 p. ]
Hierarchical Pruning; Design Space Representation Scheme; Design Space Exploration; ASIP; 계층적 탐색; 설계 공간 표현 기법; 설계 공간 탐색 기법; Attributed AND/OR Graph
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