DC Field | Value | Language |
---|---|---|
dc.contributor.advisor | Kyung, Chong-Min | - |
dc.contributor.advisor | 경종민 | - |
dc.contributor.author | Kang, Moo-Kyung | - |
dc.contributor.author | 강무경 | - |
dc.date.accessioned | 2011-12-14 | - |
dc.date.available | 2011-12-14 | - |
dc.date.issued | 2006 | - |
dc.identifier.uri | http://library.kaist.ac.kr/search/detail/view.do?bibCtrlNo=254388&flag=dissertation | - |
dc.identifier.uri | http://hdl.handle.net/10203/35335 | - |
dc.description | 학위논문(박사) - 한국과학기술원 : 전기및전자공학전공, 2006.2, [ viii, 64 p. ] | - |
dc.description.abstract | Memory-space-memory (MSM) arrangement is a popular architecture to implement three-stage Clos network switches with distributed arbitration. The scalability of this architecture, however, is limited by the round-trip communication delay between the first and the second stages. Virtual output queue (VOQ) cannot completely remove the blocking in the buffered modules under multi-class traffic conditions. In this paper, we propose a competition-free memory-memory-memory $(CFM^3)$ switch which is a three-stage Clos network switch with buffered center stage. The $CFM^3$ deploys buffered modules in all stages to simplify communication between stages. To reduce the blocking, each module is equipped with a set of buffers fully separated according to the destinations, classes of packets and the input ports of the module. Despite the buffered center stage, $CFM^3$ is free from reordering problem due to simple control mechanism. Memory overhead to implement the $CFM^3$ switch is negligible. Simulation result shows that the delay of the proposed $CFM^3$ switch closely approaches that of the ideal Output Queued switch under multi-class traffic conditions when strict priority policy popularly used for class-based switch is deployed. $CFM^3$ achieves 100% throughput under uniformly distributed four-class traffic with strict priority policy while traditional MSM switch achieves only 77% throughput. | eng |
dc.language | eng | - |
dc.publisher | 한국과학기술원 | - |
dc.subject | multi-class traffic | - |
dc.subject | Scalable switch | - |
dc.subject | three-stage switch | - |
dc.subject | 삼단 스위치 | - |
dc.subject | 다중계층 트래픽 | - |
dc.subject | 확장형 스위치 | - |
dc.title | Three-stage clos-network switch architecture with buffered center stage for multi-class traffic | - |
dc.title.alternative | 다중 계층의 트래픽을 위한 버퍼형 중간단을 가진 삼단 Clos 네트워크 스위치 | - |
dc.type | Thesis(Ph.D) | - |
dc.identifier.CNRN | 254388/325007 | - |
dc.description.department | 한국과학기술원 : 전기및전자공학전공, | - |
dc.identifier.uid | 000995001 | - |
dc.contributor.localauthor | Kyung, Chong-Min | - |
dc.contributor.localauthor | 경종민 | - |
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