Experiment of a bit slice microprocessor

Cited 0 time in webofscience Cited 0 time in scopus
  • Hit : 486
  • Download : 0
This is a subpart of a continuing research dealing with a design and construction of a general purpose mini-level digital computer system. In our system, the CPU module emulating the PACE which has 16 bit word length was designed using 3000 series bit slice microprogrammable microprocessors. In this thesis, the CPU module is implemented using the various supporting tool such as ICE-30 and ROM-SIMULATOR. The ICE-30 emulate the chip which performs major function in the microprocessor family, MCU, whose function include maintaing and generating microprogram address and control memory which contains the microprogram. They allow the use of RAMs for real time debugging of microprograms during development and debugging. With this control memory, the prototype is fully tested and operated in the single step mode and real time mode under the control of ICE-30 software and hardware.
Advisors
Park, Joseph C. H.
Description
한국과학기술원 : 전산학과,
Publisher
한국과학기술원
Issue Date
1979
Identifier
62446/325007 / 000771060
Language
eng
Description

학위논문 (석사) - 한국과학기술원 : 전산학과, 1979.2, [ [2], 46 p. ]

URI
http://hdl.handle.net/10203/33474
Link
http://library.kaist.ac.kr/search/detail/view.do?bibCtrlNo=62446&flag=dissertation
Appears in Collection
CS-Theses_Master(석사논문)
Files in This Item
There are no files associated with this item.

qr_code

  • mendeley

    citeulike


rss_1.0 rss_2.0 atom_1.0