Synthesis of function block diagrams software from NuSCR formal specification

Abstract

Software safety in nuclear engineering domain has become an important issue as relay-based analog systems are being replaced by PLC-based software. Therefore several formal specification methods have been developed and successfully applied to the systems to improve their quality. In the development of KNICS APR-1400 RPS, NuSCR was used in specifying the requirements and the FBD (Function Block Diagram), a programming language for PLC, is used to realize them into design specifications. This thesis proposes a technique for synthesizing FBD software from NuSCR formal specification. In case of KNICS APR-1400 RPS, the synthesis is possible because the NuSCR requirements were specified so rigorously and completely that they can be used to generate FBD program without further information. Our technique translates the NuSCR requirements into behaviorally equivalent FBD programs. Furthermore, the whole synthesis procedure was formally defined and its correctness was proved. This synthesis prevents design errors induced by manual FBD programming and consequently reduces the efforts required in the verification and validation. This thesis also provides a translation technique from FBD to Verilog, which enables the use of VIS verification system and SMV model checker in the verification of the FBD. In the development of complex software system, a number of design enhancement in later are common cases and they may give rise to behavioral changes and safety critical errors. In particular, the VIS checks the behavioral equivalence between the FBDs, therefore it can be used in guaranteeing the behavioral preservation between the FBDs before and after the modification of design. Proposed techniques are being applied to KNICS APR-1400 RPS that is being developed in KNICS consortium.