Design of hybrid voltage regulators for energy-efficient SoCs고성능 SoC의 에너지 효율화를 위한 전력관리 회로 설계 기법

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dc.contributor.advisor김현식-
dc.contributor.authorBae, Hong-Hyun-
dc.contributor.author배홍현-
dc.date.accessioned2024-08-08T19:31:41Z-
dc.date.available2024-08-08T19:31:41Z-
dc.date.issued2024-
dc.identifier.urihttp://library.kaist.ac.kr/search/detail/view.do?bibCtrlNo=1100083&flag=dissertationen_US
dc.identifier.urihttp://hdl.handle.net/10203/322177-
dc.description학위논문(박사) - 한국과학기술원 : 전기및전자공학부, 2024.2,[iv, 56 p. :]-
dc.description.abstractThis paper introduces a novel hybrid voltage regulator, combining a buck stage with a shunt stage, designed to optimize Dynamic Voltage Scaling (DVS) and maximize dynamic efficiency. For achieving optimal DVS, this paper presents a buck converter assisted by an Isosceles-Triangular Shunt Current (ITSC) push-pull stage. The ITSC facilitates precise control of DVS through a simple turning-point (V$_T$), and accelerates DVS rates independently of the inductance (L). The Current-Tailing Handover (CTH) ensures minimal voltage fluctuations post-DVS, even under resistive loads. Real-time calibration of the VT-crossing point effectively mitigates various error factors that can lead to DVS inaccuracies. To minimize the loss from shunt stage, this paper also introduces a pioneering hybrid voltage regulator incorporating a class-G digital-shunt regulator. This approach shows the capabilities of the class-G digital shunt regulator to substantially reduce dropout voltage in the shunt stage. Furthermore, the incorporation of a current correlation between the inductor and shunt current, governed by the ratio β, significantly shortens the current handover time. The implementation of this hybrid technique results in a remarkable improvement in dynamic efficiency, with a boost of up to 12% observed when operating at a 13kHz DVS frequency. Notably, the proposed hybrid voltage regulator exhibits remarkable versatility, efficiently accommodating a broad range of DVS frequencies, extending up to 600kHz.-
dc.languageeng-
dc.publisher한국과학기술원-
dc.subject이종-병렬 전압 레귤레이터▼a동적 전압 변동▼a이등변-삼각 병렬 전류▼a터닝 포인트 전압▼a동적 효율▼a전류-추적 핸드오버▼aClass-g 병렬 레귤레이터-
dc.subjectHybrid voltage regulator▼aDVS▼aSimple VT▼aDynamic efficiency▼aCurrent handover▼aClass-G shunt stage-
dc.titleDesign of hybrid voltage regulators for energy-efficient SoCs-
dc.title.alternative고성능 SoC의 에너지 효율화를 위한 전력관리 회로 설계 기법-
dc.typeThesis(Ph.D)-
dc.identifier.CNRN325007-
dc.description.department한국과학기술원 :전기및전자공학부,-
dc.contributor.alternativeauthorKim, Hyun-Sik-
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EE-Theses_Ph.D.(박사논문)
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