Design of hybrid voltage regulators for energy-efficient SoCs

Abstract

This paper introduces a novel hybrid voltage regulator, combining a buck stage with a shunt stage, designed to optimize Dynamic Voltage Scaling (DVS) and maximize dynamic efficiency. For achieving optimal DVS, this paper presents a buck converter assisted by an Isosceles-Triangular Shunt Current (ITSC) push-pull stage. The ITSC facilitates precise control of DVS through a simple turning-point (V$_T$), and accelerates DVS rates independently of the inductance (L). The Current-Tailing Handover (CTH) ensures minimal voltage fluctuations post-DVS, even under resistive loads. Real-time calibration of the VT-crossing point effectively mitigates various error factors that can lead to DVS inaccuracies. To minimize the loss from shunt stage, this paper also introduces a pioneering hybrid voltage regulator incorporating a class-G digital-shunt regulator. This approach shows the capabilities of the class-G digital shunt regulator to substantially reduce dropout voltage in the shunt stage. Furthermore, the incorporation of a current correlation between the inductor and shunt current, governed by the ratio β, significantly shortens the current handover time. The implementation of this hybrid technique results in a remarkable improvement in dynamic efficiency, with a boost of up to 12% observed when operating at a 13kHz DVS frequency. Notably, the proposed hybrid voltage regulator exhibits remarkable versatility, efficiently accommodating a broad range of DVS frequencies, extending up to 600kHz.