Application of Pulsed Green Laser Activation to Top-Tier MOSFET Fabrication for Monolithic 3-D Integration

Abstract

Monolithic 3-D (M3D) integration has been spotlighted as an approach to overcome the limitation of classical scaling in integrated circuits (IC). However, the fabrication of the top-tier devices in M3D is challenging because of the limited maximum thermal budget during the integration process. In this work, a nanosecond annealing process using a pulsed green laser is introduced to fabricate the top-tier devices and minimize the thermal influence on the bottom-tier devices. With green laser, the average temperature gradient along the vertical direction within top-tier devices was reduced as much as 26%, compared to excimer laser. The pulsed green laser annealing effectively activated the dopant to form the source/drain of top-tier devices, which showed lower contact resistance ( $\textit{R}_{\textit{c}}$ ) by around 38% compared to the case of rapid thermal annealing (RTA) process. Furthermore, the nanosecond green laser annealing achieved a lower equivalent oxide thickness (EOT) and 63% reduction of interface trap density ( $\textit{D}_{\text{it}}$ ) of high-K gate dielectric in the top-tier MOS devices, leading to smaller subthreshold swing (SS) and enhanced effective mobility up to 13% and 29%, respectively, compared to the use of RTA.