3D IC is becoming the most promising solution for the future low power, high bandwidth, and small size semiconductor systems including computer, mobile, and network systems. In the 3D IC, Si interposer can effectively serve as the high density and high bandwidth interconnections between the chips on the interposers. Si interposer for HBM (High-bandwidth Memory Module) is an example. In this paper, we propose a new novel interposer structure which is called as 'Active interposer.' In the proposed active interposer scheme, passive devices and active circuits are integrated together to enhance the signal integrity, and power integrity, and to lower power consumptions. The actives circuits in the Si interposer include equalizer, clock distribution network as well as DC-DC converter circuit. Also, wireless power delivery network can be added to reduce the number and space of P/G balls and vias.