High-performance solid state drives design by exploiting partial page requests부분 페이지 요청을 활용한 고성능 SSD 설계 기법

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For the last two decades, NAND flash memory-based Solid State Drives (SSDs) have been dramatically developed in terms of performance and storage capacity. Reasons behind this rapid development are to optimizing SSD architecture and shrinking process technology scaling of NAND flash memory. These technical advancements have made SSDs overcome their relative disadvantages, such as density, reliability, and cost-per-capacity. Furthermore, recent applications such as machine learning and data analytic application require more data capacity and higher performance to accelerate the speed and increase accuracy. Hence, designing high-performance SSD is a key factor for improving the performance of future computing systems. Recently, the page size of NAND flash memory, which is a basic I/O unit, is increased due to maximizing throughput and capacity of SSDs and its size is much larger than the host I/O unit. This disparity of the I/O units causes making partial requests that its sizes are smaller than the page unit. Both read and write performance of SSDs are affected by these partial requests due to the problem of partial requests such as an endurance problem, internal fragmentation, so on. This dissertation addresses the problem of partial requests and proposes effective schemes to achieve high-performance SSD. Two different solutions are proposed to mitigate partial requests problems and each solution takes charge read and write issues on partial requests, respectively. First, we discover characteristics of partial requests and improve lifetime and write performance by exploiting them. Second, we combine a partial read operation in recent NAND flash memory with compression techniques for improving both the read and write performance of SSDs. The first proposal of this dissertation, called SSSD (Subpage-based Solid State Drive), reduces the number of NAND writes and eliminates unnecessary Read-Modify-Write (RMW) operations. This scheme exploits two important observations in terms of partial page requests. First, the number of partial page writes have been increased in diverse workloads. Second, there are unnecessary RMW operations. Inspired by the two aforementioned observations, this scheme attempts to merge subpage write requests to full-page write requests in the write buffer to reduce the number of NAND writes and adds size information to the mapping table to detect unnecessary RMW operations. Our proposed scheme improves the lifetime and the write performance of SSDs. The last proposal, called PR-SSD (Partial Read-aware Solid State Drive), combines a new compression technique and a partial read operation for improving the performance of SSDs. In modern NAND flash memories, a partial read operation, which can read a page partially and has lower latency than a normal read operation, is provided. Exploiting the potentials of this operation can be a reasonable solution to mitigate the read problem of partial requests. In order to maximize partial read potentials, we artificially generate partial requests using compression techniques. However, conventional compression techniques have huge disadvantages: decompression latency and incompressible data. These disadvantages ultimately eliminate an opportunity for the partial read potentials. Thus, we introduce a new compression technique, called DPC (Dominant Pattern Compression). The key idea of DPC is inspired by memory compression techniques that are used to CPU cache and DRAM. We found dominant patterns in each granularity, which is extended more than the memory compression unit, and discovered partial zero page requests. DPC combines two observations and has very low decompression latency similar to memory compression and a higher compression ratio than memory compression. In order to exploit partial read operations for incompressible requests, we split the requests into a partial page unit and store each one in different channels for exploiting channel-level parallelism. By combining DPC and split scheme, we implemented PR-SSD, and thus it can improve both the read and write performance, and lifetime of SSDs.
Advisors
Kim, Soontaeresearcher김순태researcher
Description
한국과학기술원 :전산학부,
Publisher
한국과학기술원
Issue Date
2022
Identifier
325007
Language
eng
Description

학위논문(박사) - 한국과학기술원 : 전산학부, 2022.8,[vi, 90 :]

Keywords

Solid state drive▼aNAND flash memory▼aFlash translation layer▼aWrite buffer▼aCompression▼aPartial page read; SSD▼aNAND 플레시 메모리▼a플레시 변환 계층▼a쓰기 버퍼▼a압축▼a부분 페이지 읽기

URI
http://hdl.handle.net/10203/309232
Link
http://library.kaist.ac.kr/search/detail/view.do?bibCtrlNo=1007878&flag=dissertation
Appears in Collection
CS-Theses_Ph.D.(박사논문)
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