(A) variation-tolerant convolutional neural network processor with energy-efficient analog computation

Abstract

In this work, we propose an energy-efficient analog convolutional neural network (CNN) processor which is tolerant to variations. CNN is a machine learning algorithm that shows high accuracy in applications such as image recognition and data classification. One of the characteristics of CNN is that it consumes a lot of power due to a large number of MAC (Multiply-and-accumulate) operations. Since the demand for energy-efficient CNN processors to be processed at the edge device is increasing recently, CNN processors have been designed using analog circuit-based MAC operators instead of digital circuit-based MAC operators. However, there are two major problems with conventional CNN processors which use analog computation. First, large power consumption due to frequent analog-to-digital and digital-to-analog data conversion between interim layers of CNN limits the total energy efficiency of the CNN processor. Second, since the analog circuit inherently suffers from the PVT variations, the performance of the processor is degraded by the variations. To address the two issues of the conventional CNN processors, analog datapath which includes analog memory is proposed to eliminate the power overhead of A/D and D/A conversion and variation-tolerant computation and write-with-feedback are proposed to eliminate the variation dependency of the computation.