SEMICONDUCTOR DEVICE반도체 장치

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A semiconductor device may include a clock driver including a first gate line, a second gate line, a third gate line and a fourth gate line each extending in a first direction, the first gate line and the second gate line each configured to receive a clock signal, and the third gate line and the fourth gate line each configured to receive an inverted clock signal; a master latch circuit overlapping the first gate line and the third gate line such that the master latch circuit receive the clock signal from the first gate line and receive the inverted clock signal from the third gate line; and a slave latch circuit overlapping the second gate line and the fourth gate line such that the slave latch circuit receives the clock signal from the second gate line, and receives the inverted clock signal from the fourth gate line.
Assignee
KAIST, ELECTRONICS CORP AMERICA
Country
CH (Switzerland)
Application Date
2019-01-03
Application Number
108100156
Registration Date
2022-05-21
Registration Number
I765134
URI
http://hdl.handle.net/10203/297566
Appears in Collection
EE-Patent(특허)
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