The Effect of Bias Stress on the Performance of Amorphous InAlZnO-Based Thin Film Transistors

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In amorphous InAlZnO (a-IAZO), the addition of the third cation of Al further slows the crystallization kinetics of In2O3 and enhances amorphous phase stability, compared to the binary cation system of InZnO. In addition, substantially high carrier mobilities of a-IAZO are obtained, in its unannealed state: Hall mobility of 30-50 cm(2)/Vs at a high carrier density regime (>similar to 10(18)/cm(3)) and thin film transistor (TFT) field effect mobility of similar to 8-15 cm(2)/Vs at a low carrier density regime (<similar to 10(16)/cm(3)). Gate bias stress stability of IAZO TFTs is investigated with positive and negative gate biases over time. Because of the channel depletion of n-type IAZO when negative gate bias is applied, no performance instabilities were identified. However, with positive gate bias stress (PBS) conditions (30 V), the threshold voltage (V-T) shifts towards higher voltages during the initial 100 s and then no significant changes in V-T are observed during the remaining time, over 10(5) s of the dependent measurements. The TFT field effect mobility shows a similar trend: increases from 7.64 cm(2)/Vs to 11.74 cm(2)/Vs within the first 100 s and then is saturated. It is identified that the PBS-induced device parameter variations are attributed to an increase and saturation of trap density at the channel/dielectric interface.
Publisher
SPRINGER
Issue Date
2022-04
Language
English
Article Type
Article
Citation

JOURNAL OF ELECTRONIC MATERIALS, v.51, no.4, pp.1813 - 1819

ISSN
0361-5235
DOI
10.1007/s11664-022-09453-6
URI
http://hdl.handle.net/10203/292571
Appears in Collection
MS-Journal Papers(저널논문)
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