ECIM: Exponent Computing in Memory for an Energy-Efficient Heterogeneous Floating-Point DNN Training Processor

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The authors propose a heterogeneous floating-point (FP) computing architecture to maximize energy efficiency by separately optimizing exponent processing and mantissa processing. The proposed exponent-computing-in-memory architecture and mantissa-free exponent-computing algorithm reduce the power consumption of both memory and FP MAC while resolving previous FP computing-in-memory processors' limitations. Also, a bfloat16 DNN training processor with proposed features and sparsity exploitation support is implemented and fabricated in 28-nm CMOS technology. It achieves 13.7-TFLOPS/W energy efficiency while supporting FP operations with CIM architecture.
Publisher
IEEE COMPUTER SOC
Issue Date
2022-01
Language
English
Article Type
Article
Citation

IEEE MICRO, v.42, no.1, pp.99 - 107

ISSN
0272-1732
DOI
10.1109/MM.2021.3096236
URI
http://hdl.handle.net/10203/292445
Appears in Collection
EE-Journal Papers(저널논문)
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