Power Reduction in Punch-Through Current-Based Electro-Thermal Annealing in Gate-All-Around FETs
| DC Field | Value | Language |
|---|---|---|
| dc.contributor.author | Kim, Min-Kyeong | ko |
| dc.contributor.author | Choi, Yang-Kyu | ko |
| dc.contributor.author | Park, Jun-Young | ko |
| dc.date.accessioned | 2022-02-08T06:43:48Z | - |
| dc.date.available | 2022-02-08T06:43:48Z | - |
| dc.date.created | 2022-02-08 | - |
| dc.date.created | 2022-02-08 | - |
| dc.date.created | 2022-02-08 | - |
| dc.date.issued | 2022-01 | - |
| dc.identifier.citation | MICROMACHINES, v.13, no.1 | - |
| dc.identifier.issn | 2072-666X | - |
| dc.identifier.uri | http://hdl.handle.net/10203/292124 | - |
| dc.description.abstract | Device guidelines for reducing power with punch-through current annealing in gate-all-around (GAA) FETs were investigated based on three-dimensional (3D) simulations. We studied and compared how different geometric dimensions and materials of GAA FETs impact heat management when down-scaling. In order to maximize power efficiency during electro-thermal annealing (ETA), applying gate module engineering was more suitable than engineering the isolation or source drain modules. | - |
| dc.language | English | - |
| dc.publisher | MDPI | - |
| dc.title | Power Reduction in Punch-Through Current-Based Electro-Thermal Annealing in Gate-All-Around FETs | - |
| dc.type | Article | - |
| dc.identifier.wosid | 000746012300001 | - |
| dc.identifier.scopusid | 2-s2.0-85123052565 | - |
| dc.type.rims | ART | - |
| dc.citation.volume | 13 | - |
| dc.citation.issue | 1 | - |
| dc.citation.publicationname | MICROMACHINES | - |
| dc.identifier.doi | 10.3390/mi13010124 | - |
| dc.contributor.localauthor | Choi, Yang-Kyu | - |
| dc.contributor.nonIdAuthor | Kim, Min-Kyeong | - |
| dc.contributor.nonIdAuthor | Park, Jun-Young | - |
| dc.description.isOpenAccess | N | - |
| dc.type.journalArticle | Article | - |
| dc.subject.keywordAuthor | annealing | - |
| dc.subject.keywordAuthor | dielectric | - |
| dc.subject.keywordAuthor | gate-all-around (GAA) | - |
| dc.subject.keywordAuthor | hot-carrier injection (HCI) | - |
| dc.subject.keywordAuthor | power consumption | - |
| dc.subject.keywordAuthor | punch-through | - |
| dc.subject.keywordAuthor | reliability | - |
| dc.subject.keywordAuthor | logic transistors | - |
| dc.subject.keywordPlus | DEGRADATION | - |
| dc.subject.keywordPlus | IMPROVEMENT | - |
| dc.subject.keywordPlus | MODEL | - |
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